Code for Speed with High Bandwidth Memory on Intel® Xeon Phi™ Processors

Overview

The 2nd generation Intel® Xeon Phi™ processor family x200 (code-name Knights Landing) brings in new memory technology, a high bandwidth on package memory called Multi-Channel DRAM (MCDRAM) in addition to the traditional DDR4. MCDRAM is a high bandwidth (~4x more than DDR4), low capacity (up to 16GB) memory, packaged with the Knights Landing silicon. MCDRAM can be configured as a third level cache (memory side cache) or as a distinct NUMA node (allocatable memory) or somewhere in between. With the different memory modes by which the system can be booted, it becomes very challenging from a software perspective to understand the best mode suitable for an application. At the same time, it is also very essential to utilize the available memory bandwidth in MCDRAM efficiently without leaving any performance on the table.

This talk will cover methods and tools for users to analyze the suitable memory mode for an application. It will also cover the use the “memkind” library interface, a user-extensible heap manager built on top of jemalloc. This library interface lets users change their application memory allocations to the high bandwidth MCDRAM as opposed to the standard DDR4.

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通知版本 #20110804