Think Parallel Modern Applications for Modern Hardware


High performance computing (HPC) codes have used MPI and similar models to scale to multiple nodes, but increasingly parallelism is also required within a node, and even within a single core. Application programmers must be prepared to address parallelism at the message passing, threading, and SIMD layers. Upon completion of this webinar you will become familiar with modern Intel parallel architectures and Intel® Xeon Phi™ architecture for both hardware and software.



英特尔的编译器针对非英特尔微处理器的优化程度可能与英特尔微处理器相同(或不同)。这些优化包括 SSE2、SSE3 和 SSSE3 指令集和其他优化。对于在非英特尔制造的微处理器上进行的优化,英特尔不对相应的可用性、功能或有效性提供担保。该产品中依赖于微处理器的优化仅适用于英特尔微处理器。某些非特定于英特尔微架构的优化保留用于英特尔微处理器。关于此通知涵盖的特定指令集的更多信息,请参阅适用产品的用户指南和参考指南。

通知版本 #20110804