|License:||Intel Sample Source Code License Agreement|
|OS:||64-bit Microsoft Windows® 10|
(Programming Language, tool, IDE, Framework)
|Microsoft Visual Studio* 2017, Microsoft DirectX* 12|
|Prerequisites:||Familiarity with Visual Studio, DirectX 12 API|
Checkerboard Rendering (CBR) is a technique that produces full-resolution pixels with a significant reduction in shading and minimal impact on visual quality. CBR is fully compatible with modern post-processing approaches to anti-aliasing and it can be implemented in both forward and deferred rendering pipelines.
Dynamic Resolution Rendering (DRR) is an established technique that dynamically adjusts the resolution to which you render the 3D scene and then scales this to the output back buffer.
The accompanying sample code demonstrates both CBR and DRR and provides a base implementation in a forward rendering pipeline; additionally, the accompanying white paper describes an implementation in a deferred rendering pipeline. While our focus was on integrated graphics processing units (GPUs), our implementations for both forward and deferred rendering have been tested to run on both AMD and NVIDIA discrete GPUs.
The sample is designed to "build and run" and is an augmentation of the DirectX 12 MiniEngine from the Microsoft DirectX-Graphics-Samples. Simply clone (or download) the repository, build the MiniEngine\ModelViewer\ModelViewer_VS17.sln solution and run. Both CBR and DRR are enabled by default, they (along with multiple other post processes) can be enabled or disabled by pressing the 'backspace' key to bring up the toggle menu. Download the code from GitHub* and read Checkerboard Rendering for Real-Time Upscaling on Intel Integrated Graphics, v. 12 to learn more.
The CBR options in the toggle menu are as follows:
The DRR options in the toggle menu are as follows:
Jalal El Mansouri, Rendering Rainbow Six Siege, GDC 2016
Graham Wihlidal, 4K Checkerboard in Battlefield 1 and Mass Effect: Andromeda, GDC 2017
Doug Binks, Dynamic Resolution Rendering Updated, 2011
For additional references, see Checkerboard Rendering for Real-Time Upscaling on Intel Integrated Graphics, v. 12.
Created August 8, 2018
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804