Error when using compilervars.csh/ippvars.csh - arch: Undefined variable.

Published: 02/18/2014, Last Updated: 02/18/2014

Reference number: DPD200253488

Products: Intel® C++ Composer XE, Intel® Integrated Performance Primitives for Linux*

Version: 2013 SP1 Update 2 (compiler 14.0), IPP 8.1 (Initial Release)

Operating Systems: Linux* / IA-32, Intel® 64

Problem Description:

A defect exists in the Intel® Integrated Performance Primitives (IPP) 8.1 Initial release in the ippvars.csh file distributed for Linux* (found under: /opt/intel/composer_xe_2013_sp1/ipp).

The IPP 8.1 release (Package ID: l_ipp_8.1.0.144) is available as a stand-alone download or bundled with the Intel® Composer XE 2013 SP1 Update 2 release (Package id: l_ccompxe_2013_sp1.2.144) for customers with valid licenses from the Intel Registration Center.

The defect is caused by improper initialization an internal variable used within the script that leads to the error “arch: Undefined variable.” when the script is sourced directly or indirectly via the compilersvars.csh script (found under: /opt/intel/composer_xe_2013_sp1/bin).

For example:

$ cd /opt/intel/composer_xe_2013_sp1.2.144/bin
$ source ./compilervars.csh intel64
arch: Undefined variable.

Resolution:   This defect is fixed in the Intel® C++ Composer XE 2013 SP1 Update 3 Release (Package id: l_ccompxe_2013.1.3.174 - Version Build 20140422) now available from our Intel Registration Center.

In lieu of a permanent fix, users (or sys-admins) with appropriate root privileges can edit the ippvars.csh file to insert ONLY the new line 37 as noted in the code snippet below (ahead of line 38 which is the original line 37) to set the variable arch to the value of the first incoming argument (e.g. $1):

     37    set arch="$1"
     38    if ( "$1" == "ia32_intel64" ) then
     39     setenv arch intel64
     40    endif


Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804