Intel Cup Undergraduate Electronic Design Contest-Embedded System Design Invitation Contest 2020

Overview

After 18 years, the Embedded System Design Contest (ESDC) is now one of China's high-profile collegiate STEM contest. In this invitation-only contest, undergraduate students across the world compete head to head to build innovative designs while cultivate innovation, teamwork and hands on engineering experience. Projects are based on the latest generation of Intel® embedded hardware and software tools. Started in 2002, this high-profile biannual contest has attracted 3000+ students from almost 100 universities worldwide, and influenced tens of thousands faculties and students.

Timeline and Rules

Contest Timeline

  1. Deadline for registration of university contact person and the number of participate teams: July 10, 2020
  2. Deadline for preliminary project proposal submission: July 15, 2020
  3. Appraisal of the preliminary proposal: July 26~30, 2020
  4. Deadline for final design reports submission: Oct 1, 2020
  5. Regional appraisal: Oct 10~15, 2020 (Arrangement TBD)
  6. National appraisal: Oct 20~25, 2020 (Arrangement TBD)

Contest Timeline subjects to change, please refer to the official contest website for the final arrangement

Rules

Please refer to the official contest website at ESDC

Hardware Platform

Development of contest projects must be based on the following hardware:
AI-BoxX Gen.1 (WHL-U+HDDL-R8) – Required
DE10-Nano FPGA /  DE10-Lite  FPGA  –  Optional (up to one per team)
Heterogeneous Extensible Robot Open Platform (HERO) - Optional

Intel Tools and Resources

Intel® Distribution of OpenVINO™ Toolkit

Intel® System Studio

Intel® FPGA Development Tools – Intel® Quartus® Prime Lite edition

Intel® SoC FPGA Embedded Development Suite (SoC EDS) Standard Edition

Training and Support

Main Platforms

An Introduction to the HDDL Based AI Solution

A scalable AI computing platform architecture for IoT video, when teamed with VPU accelerator HDDL-R8 for deep learning with 8 Intel® Movidius™ Myriad™ X AI visual processing units, enables powerful deep learning inference capabilities and further enhance Intel’s end-to-end AI product portfolio.

Intel® Vision Accelerator with Intel® Movidius™ Vision Processing Units (VPU):

Introduction to Whiskey Lake platform

Whisky Lake (WHL) is the 2019 Core U series, optimized for embedded, retail and gaming verticals usages like IPC, HMI, digital signage, office automation, lottery, Pachinko and table gaming.

OpenVINO™ Online Courses

Edge Computing An Introduction Session (Available Soon)

The Internet of Things is evolving along the path from interconnection to intelligence and from intelligence to autonomy. The combination of edge computing and artificial intelligence technology will be the development direction of the Internet of Things in the future. This training will introduce the evolution of the Internet of Things edge computing system, the challenges, solutions and future development trends of artificial intelligence-based edge computing systems.

MOOC Course: Application of Machine Vision and AI on the Edge

This course mainly introduces the basic principles of algorithms of Convolutional Neural Network (CNN) and object detection for computer vision, and elaborates the installation and use of Intel’s open source OpenVINO™ platform for machine learning. Through hands on exercises, this course provides extensive introduction to the application of computer vision in the typical fields such as number plate recognition, intelligent traffic light control, smart classroom, hazardous commodity recognition and more.
Learn the Course

  • Chapter 1: Neural network principle and practice
  • Chapter 2: Convolution Neural Network principle and introduction to models
  • Chapter 3: Object detection principle and introduction to models
  • Chapter 4: Introduction to OpenVINO Toolkit and application
  • Chapter 5: Use case based on OpenVINO compute at the edge (Intelligent traffic light control, smart classroom, hazardous commodity recognition)
  • Chapter 6: Practice exercise (put OpenVINO into practice)

FPGA Development Kit Introduction from Terasic*

DE10-Nano Kit

Introduction to  DE10-Nano Kit

Design Resource for DE10-Nano Kit

DE10-Lite Board

Introduction to DE10-Lite Board

Design Resource for DE10-Lite Board

Demo video for DE10-Lite Board

Training from Intel FPGA China Innovation Center 

FPGA Online Training Courses: with more technical training and resources on FPGA

Intel FPGA Development Tools Online Training

Introduction to FPGA Design with Intel Quartus

Creating a System Design with Platform Designer

Introduction to Platform Designer

Hardware Design Flow for Intel based SoC

Software Design Flow for Intel based SoC

Heterogeneous Extensible Robot Open Platform (HERO)

Introduction to Heterogeneous Extensible Robot Open Platform (HERO)

The HERO computing platform is a set of scalable open heterogeneous computing platforms designed and developed by Intel Labs China (ILC) for smart devices.
By utilize Intel computer vision inference and network optimization development kit OpenVINO on the HERO platform, users enjoy the rapid deployment of deep learning networks on different hardware accelerators in a convenient and efficient way to optimize system performance, applicable in the areas of smart robots, smart homes, smart retail, lightweight autonomous driving and more. 

Introduction to Heterogenous Extensible Robot Open Platform (HERO)

Introduction to Robot 4.0

Adaptive Human-Robot interaction Software Library Introduction and Download

More technical resources can be found in the forum, community and WeChat*/QQ group:
•    Leading edge Robot research at Intel Labs China and co-organized challenges/workshop
•    Computer on Module introduction
•    Robot Key technologies introduction
•    Robot related application introduction

Intel Software Tools

Intel® System Studio Product Brief

Intel® System Studio, 1 year free license with community forum support

Community Support

OpenVINO Forum

OpenVINO China Community (coming soon)

Connect to the Community via WeChat

wechat
 

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804