New Vectorization Diagnostics starting from Intel® Fortran Compiler 15.0

By Devorah Hayman,

Published:05/26/2015   Last Updated:12/27/2018

We have a similar catalog of vectorization diagnostics for the Intel® C++ Compiler HERE

The following diagnostic messages from the vectorization report produced by Intel® Fortran Compiler. To obtain a vectorization report use Intel® Fortran Compiler options: -qopt-report -qopt-report-phase=vec (Linux* OS and OS X*) or /Qopt-report /Qopt-report-phase:vec (Windows* OS).

Diagnostics Number

Diagnostic Description

Diagnostic 15552 loop was not vectorized with "simd"
Diagnostic 15300 LOOP WAS VECTORIZED
Diagnostic 15304 non-vectorizable loop instance from multiversioning
Diagnostic 15310 loop was not vectorized: operation cannot be vectorized
Diagnostic 15319 loop was not vectorized: novector directive used
Diagnostic 15328 vectorization support:irregularly indexed load was emulated for the variable <a(index(i))>
Diagnostic 15331 Using FP model precise prevents vectorization
Diagnostic 15335 vectorization possible but seems inefficient
Diagnostic 15316 simd loop was not vectorized: scalar assignment in simd loop is prohibited, consider private, lastprivate or reduction clauses 
Diagnostic 15340 pragma supersedes previous setting
Diagnostic 15344 loop was not vectorized: vector dependence prevents vectorization
Diagnostic 15346 vector dependence: assumed ANTI dependence between  line x and  line x
Diagnostic 15378 xxxx was not vectorized: /Qfreestanding flag prevents vectorization of integer divide/remainder
Diagnostic 15398 loop was not vectorized: loop was transformed to memset or memcpy
Diagnostic 15414 loop was not vectorized: loop body became empty after optimizations
Diagnostic 15415 vectorization support: gather was generated for the variable a: indirect access
Diagnostic 15423 loop has only one iteration
Diagnostic 15516 loop was not vectorized: cost model has chosen vectorlength of x -- maybe possible to override via pragma/directive with vectorlength clause
Diagnostic 15517 loops in this subroutine cannot be vectorized due to use of EBX/RBX register in inline ASM.
Diagnostic 15520 loop was not vectorized: loop with early exits cannot be vectorized
Diagnostic 15521 loop was not vectorized: explicitly compute the iteration count before executing the loop
Diagnostic 15522 loop was not vectorized: loop control flow is too complex. Simplify control flow
Diagnostic 15523 loop was not vectorized: cannot compute loop iteration count before executing the loop
Diagnostic 15524 loop was not vectorized: search loop cannot be vectorized unless all memory references can be aligned vector load
Diagnostic 15527 loop was not vectorized: function call to xxxx cannot be vectorized
Diagnostic 15529 loop was not vectorized: volatile assignment was not vectorized. Try using non-volatile assignment
Diagnostic 15532 loop was not vectorized: compile time constraints prevent loop optimization
Diagnostic 15534  loop was not vectorized: loop contains arithmetic if or computed goto. Consider using if-then-else statement. 
Diagnostic 15535 xxxx was not vectorized: loop contains switch statement. Consider using if-else statement.
Diagnostic 15537 loop was not vectorized: implied FP exception model prevents usage of SVML library needed for truncation or integer divide/remainder
Diagnostic 15541 outer loop was not auto-vectorized: consider using SIMD directive
Diagnostic 15542 loop was not vectorized: inner loop was already vectorized
Diagnostic 15543 loop was not vectorized: loop with function call not considered an optimization candidate.
Diagnostic 25463 Optimization for this routine was skipped to constrain compile time. Consider overriding limits (-qoverride-limits).
Diagnostic 25464 Some optimizations were skipped to constrain compile time. Consider overriding limits (-qoverride-limits).

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804