Intel® IPP 2017 Bug Fixes

By Chao Yu, Published: 09/23/2016, Last Updated: 04/28/2017

NOTE: Defects and feature requests described below represent specific issues with specific test cases. It is difficult to succinctly describe an issue and how it impacted the specific test case. Some of the issues listed may impact multiple architectures, operating systems, and/or languages. If you have any questions about the issues discussed in this report, please visit our Get Help page for support options.

Intel® IPP 2017 Update 3 (28 Apr 2017)

IPPD-1764 Added the AVX512 optimization for ippiResize functions.
IPPD-1933 ippsFilterMedian_32s overriding the dst buffer
IPPD-2019 ippiDilateBorder document error

IPP Performance Tools document error

Intel® IPP 2017 Update 2 (23 Feb 2017)

DPD200416859 ippiFilterBorder_16u_C1R performance regression in 2017 Update 1
DPD200416809 some headers files is not "strictly" C, and some compilers reports comping warnings
DPD200590067 ippiFilterBorder_8u_C4R bug on the SSE4 optimization code

multiple definition for "__libm_exp_hi_table_64 symbol", and the compile reports the “__libm_exp_hi_table_64 already defined in libmmt.lib” error

DPD200415831 ippInit function reports unknown feature  on the processors with the MPX feature support
DPD200415672 wrong result of Image histogram ippiHistogram_8u_C1R function
DPD200588425 ippsSqrt_64f_A53 returning the wrong result for the input value DBL_MAX
DPD200414562 wrong result by using IPP_INPAINT_TELEA as flag for ippiInpaint function
DPD200588877 add AVX512 optimization for ippsFFTwd_CToC_32fc function
DPD200415944 document improvement:  improve the description on ippSetNumThreads functions for ippStsNoOperation return value
DPD200415944 document improvement: ippiResizeGetSize function returns a minimal non-zero value for the BuffSize size


Intel® IPP 2017 Update 1 (1 Nov 2016)

DPD200588266 the version number error in the ThreadedFunctionsList.txt file
DPD200414513 ippiErode_8u_C1R performance regression for the image size with 640x480
DPD200588147 Documentation error for the ippsFilterMedian_64f_I function
DPD200587882 ippiFilter_64f_C1R bug creating wrong result for for 1xH mask
Workaround: use ippiFilter_64f_C1R with 2xH mask and set last column as zero.
DPD200585146 ippsMax_32f and ippsMin_32f providing inconsistent results for the NaN values in the AVX2 and SSE4.2 processors
DPD200414601 the RGBToHLS functions documentation error

Intel® IPP 2017  (6 Sep 2016)

DPD200581260 ippsRegExpFind_8u generating stack overflow 
DPD200583297 ippiCopy_32f_C1R producing wrong results on AVX optimization code.  Workaround: use ippsCopy_32f on each image line
DPD200583697 documentation problems in ippi.h headers:  the descriptions for the filter functions with fixed kernel were wrong

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804