Version:2021.1 Last Updated:01/11/2021
Intel® oneAPI tools integrate with third-party integrated development environments (IDEs) on Linux* and Windows* to provide a seamless GUI experience for software development. Access the entire IDE suite using Eclipse* on Linux* and Visual Studio* on Windows*. After installing the Intel® oneAPI tools, select tools integrate into the IDE menu.
NOTE: For FPGA development with Visual Studio Code on Linux*, refer to Intel® oneAPI DPC++ FPGA Development with Sample Browser Extension for Visual Studio Code on Linux.
Both the Eclipse and Visual Studio IDEs perform DPC++ compilation in two stages — the compile stage and the link stage. You might need to pass different compiler arguments to different stages, as follows:
Stages | Description | Argument to Pass |
---|---|---|
Compile Stage | Parses the input files and compiles the host code. | Pass host code compile-specific arguments (for example, definitions). |
Link Stage | Compiles the kernel code and links the kernel compile binary with the host code compile binary into the final binary. | Pass kernel code compile-specific arguments (for example, FPGA flow arguments). |
In both the Eclipse and Visual Studio IDEs, by default, all projects support Debug and Release compile targets and the purpose of these two targets can be confusing due to the presence of multiple levels of debug information in FPGA compiles. The behavior of the compilation targets are as follows:
NOTE: The Release target does not remove the internal debug data used by the FPGA optimization reports, so you can still review the reports.
NOTE: This section assumes you have completed performing instructions from Build and Run a Sample Project Using Eclipse*.
NOTE: Compilation using the Intel® oneAPI DPC++/C++ Compiler in Eclipse* works only if Eclipse is launched from a terminal in which the setvars.sh script has already been run.
FPGA development supports emulation and hardware compilation modes. For detailed information, refer to Types of DPC++ FPGA Compilation in the Intel® oneAPI Programming Guide.
There are several supported project types in Eclipse* that you can use for your Data Parallel C++ project, such as:
Intel® recommends the Makefile and the CMake-based flows.
Intel® recommends that you create your new CMake project using a sample or an example design, as described in Create a Project Using an FPGA Example Design or Tutorial. This way, you need not create FPGA-specific targets. Instead, you can adjust the existing targets to your needs. If you want to create a clean CMake project, you can do so through the File > New > C/C++ Project > CMake Project.
To create a new Makefile project, perform these steps:
When creating a new project, make sure you select C++ Managed Build and use the Intel® oneAPI DPC++/C++ Compiler toolchain. Then, follow these instructions to create default build configurations, including corresponding compiler options, to simplify the process of building FPGA executables:
NOTE: The Project menu options are also available by right-clicking on the project.
NOTE: To add compiler options, go to Project > Properties > C++ Build > Settings > Tool Settings > Linker step > Miscellaneous tab. Refer to the Add Build Options section for more information.
After you generate the report using one of the following methods, it is displayed in a tab within the Eclipse* editor. For more information about the optimization reports, refer to the Intel® oneAPI DPC++ FPGA Optimization Guide.
Generate the FPGA optimization report using one of the following methods:
Build the reports' target (make report) directly, and then locate the ide_report.html file in the project directory’s reports folder. Double-clicking this HTML file launches the report in the IDE.
Generate the FPGA optimization report using one of the following methods:
NOTE: All three methods are available only if the correct project build configuration or the corresponding compiler option is selected.
You can create new projects using pre-designed FPGA example designs and tutorials. Follow these steps to create a project based on a sample:
Once you launch the sample, if you build the sample project, an FPGA emulator executable is created. If you want to compile the design for a different target, you should first view the prepopulated targets in the Build Targets drop-down list in your project’s Build/Debug directory. If the desired target is not available in the drop-down list, view the build targets available in the Makefile in the Outline window.
NOTE: Only some FPGA samples support running on different FPGA boards. Refer to the README file of the sample you are using for more information.
If the sample you are running supports changing the FPGA hardware board being compiled for by using the -DFPGA_BOARD CMake definition, you can pass this argument as follows:
In CMake and Makefile projects, you can adjust the build options by modifying the underlying CMakeLists.txt or Makefile to add or remove options from the targets you want to adjust.
You can add miscellaneous options to the compile as follows:
Note: This section assumes you have already performed instructions listed in Build and Run a Sample Project Using Microsoft Visual Studio*.
There are predesigned FPGA example designs and tutorials that you can build and run in the Microsoft Visual Studio* IDE. Follow these steps to create a project based on a sample:
Once the sample is launched, if you build the sample project, an FPGA emulator executable is created that you can run using the Visual Studio* IDE.
If you want to run a sample that is not in the FPGA folder, ensure that you set the FPGA-specific options, as described in Build FPGA Emulator Executables.
NOTE: In this release of Intel® oneAPI Base Toolkit, the FPGA emulation, reports, and hardware flow are supported.
NOTE: Extra command-line options are not required if the intel::fpga_emulator_selector is used by default.
Follow these steps to generate an optimization report in the Microsoft Visual Studio* IDE:
Once compilation finishes, the FPGA optimization reports open in the Visual Studio. If you want to open them in a browser or re-open them later, the report.html file is created in the x64/<Configuration_name>/<project_name>.proj/reports/ folder. You can open and view this file in most of the standard web browsers. For more information about the optimization reports, refer to the Intel® oneAPI DPC++ FPGA Optimization Guide.
You can add miscellaneous options to the compile as follows:
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