Intel® Parallel Computing Center at Imperial College London and SENAI CIMATEC

Published: 06/11/2015, Last Updated: 12/04/2018

Imperial College London and SENAI CIMATEC logo

Principal Investigators:

Gerard Gorman

Gerard Gorman is a Senior Lecturer in the Department of Earth Science and Engineering and Associate Director of the Centre for Computational Methods in Science and Engineering at Imperial College London. He has a BSc in Physics, MSc in High Performance Computing from National University of Ireland, Galway, and PhD in Computational Physics from Imperial College London. Gerard has a diverse range of experience in interdisciplinary research projects ranging across geoscience applications, industrial CFD and nuclear engineering. Gerard’s current research interests are focused on applying disruptive software technologies such as domain specific languages and code generation techniques for many-core architectures to Full-Waveform Inversion for energy exploration.


Marcos de Aguiar

Marcos de Aguiar is Technical lead for software development at the SENAI CIMATEC Supercomputing Center for Industrial Innovation in Brazil. He has a BSc in Computer Science from Faculdade Ruy Barbosa and is a Master candidate in Computer Science at Federal University of Bahia in the area of Machine Learning and analytics. Marcos is responsible for lead the efforts on code optimization and parallelization at SENAI CIMATEC. Marcos has over eleven years of software development expertise from various industries and technologies. From industrial automation, life sciences, to financial trading systems, with extensive experience in both front end and back end technologies, as well as software development processes. Marcos's current research interests are, optimization for multi and many core architectures, code generation for high performance computing, cluster computing, Big Data analytics and Machine Learning.


The Intel® Parallel Computing Center(s) (Intel® PCC) on Open Performance portablE SeismiC Imaging (OPESCI) is a unique collaboration between researchers at Imperial College London and SENAI CIMATEC in Brazil, and industrial partners Intel and BG Group, focused developing disruptive software on many-core computer architectures.

The application focus is on energy exploration which relies upon accurate subsurface imaging techniques such as Full Waveform Inversion. The data and compute intensity of this problem, subsurface imaging is arguably the largest big data and high performance computing application in the private sector. The advancement in this area requires innovations on many fronts: inversion algorithms; advanced numerical discretization (high order methods, finite difference, finite element, spectral element methods); more complete physics models (e.g. anisotropic elastic waves); and software optimization (sometime means reimplementation) for modern low power many-core and heterogeneous computing platforms.

These challenges stack up to bring the curse of dimensionality to innovation. The implementation overhead related to introducing of new numerical methods and algorithms can consume whole research teams and potentially involve modifying millions of lines of code. In our research we have abandoned the idea that developers need to write most of the code manually. High level languages are combined with multiple layers of abstraction and domain specific languages to maintain the flexibility and expressiveness of a high level language like Python*, while at the same time exploiting code generation and compiler technologies to generate high performance native code for different computer architectures. The result is a separation of concerns where new numerical approaches are readily evaluated and are capable of outperforming hand tuned code by exploring implementation options that would be unfeasible or unsustainable to maintain manually.


Related Websites:

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804