Intel® Xeon Phi™ Coprocessor Developer's Quick Start Guide

By Loc Q Nguyen,

Published:09/29/2014   Last Updated:11/17/2014

Download Entire Articles



This document will help you get started writing code and running applications on a system (host) that includes the Intel® Xeon Phi™ Coprocessor based on the Intel® Many Integrated Core Architecture (Intel® MIC Architecture). It describes the available tools and includes simple examples to show how to get C/C++ and Fortran-based programs up and running. For now, the developer will have to cut/paste the examples provided in the document to their system.

This document is available at under the "Overview"tab.


This document does:

  1. Walk you through the Intel® Manycore Platform Software Stack (Intel® MPSS) installation.
  2. Introduce the build environment for software enabled to run on Intel® Xeon Phi™ Coprocessor .
  3. Give an example of how to write code for Intel® Xeon Phi™ Coprocessor and build using Intel® Composer XE 2015.
  4. Demonstrate the use of Intel libraries like the Intel® Math Kernel Library (Intel® MKL).
  5. Point you to information on how to debug and profile programs running on an Intel® Xeon Phi™ Coprocessor .
  6. Share some best known methods (BKMs) developed by users at Intel.

This document does not:

  1. Cover each tool in detail. Please refer to the user guides for the individual tools.
  2. Provide in-depth training.

Summary of recent changes:

  • September 26, 2014: Intel® Xeon Phi™ Coprocessor Developer's Quick Start for Windows* (version 1.4) 
  • November 17, 2014: Intel® Xeon Phi™ Coprocessor Developer's Quick Start for Linux* (version 1.8)

Additional Resources

Intel® Xeon Phi™ Advanced Workshop Labs

Intel® Xeon Phi™ Coprocessor Instruction Set Architecture Reference Manual (PDF)

Intel® Xeon Phi™ Coprocessor - the Architecture

Forum: Intel® Many Integrated Core Architecture (Intel MIC Architecture)

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804