Intel® Xeon® Processor E7 v2 Family

By Belinda M Liviero,

Published:02/18/2014   Last Updated:02/18/2014

Based on Intel® Core™ microarchitecture (formerly codenamed Ivy Bridge) and manufactured on 22-nanometer process technology, the Intel® Xeon® Processor E7 V2 Family processors provide significant performance, memory and cache bandwidth, and memory capacity over the previous-generation Intel® Xeon® processor E7-4800 product family. This is the first Intel® Xeon® processor family that supports Advanced Vector Extensions ( Intel® AVX). The Intel® Xeon® Processor E7 v2 family also introduces new reliability features for mission-critical operation.

See this technical whitepaper for a more in-depth discussion of the key features and architecture.

Key supported features you should be aware of, as a Software Developer:

  • New Reliability features include Machine Check Architecture (MCA) Recovery– Execution Path to allow systems to detect errors in data passed to the processors, Enhanced Machine Check Architecture (eMCA) Gen1 allows you to log more information about corrected and uncorrectable errors and MCA recovery for I/O enables systems to recover from certain I/O error conditions that would otherwise have been fatal to application and server reliability. At-a-glance information about these features can be found here. A detailed whitepaper on MCA-recovery and making applications recovery-aware is here.
  • Intel® Secure Key provides high quality, high-performance entropy, and random number generation, allowing you to develop software that is more secure. Read more.
  • Intel® OS Guard helps prevent Escalation of Privilege attacks and is enabled at the VMM and Operating System levels. It protects the operating system (OS) from applications that have been tampered with or hacked by preventing an attack from being executed from application memory. Intel OS Guard also protects the OS from malware by blocking application access to critical OS vectors. Please contact your OS or VMM providers to find out when support will be integrated into their releases.
  • Intel® Advanced Vector Extensions (Intel® AVX) introduces many architectural enhancements such as supporting 256-bit wide vectors and Single-instruction Multiple-data (SIMD) register set and enhancement of legacy 128-bit SIMD instruction extensions. Intel® AVX will benefit floating-point-intensive calculation applications such as scientific and financial applications. Here is how a financial application is taking advantage of Intel® AVX and an example of how much the LINPACK benchmark was observed to benefit from moving from SSE to AVX instructions on this platform. Also included are  Float 16 Format Conversion Instructions (AVX Float16) instructions, which introduce half-precision (16-bit) floating-point format, often used in graphics and imaging applications, and provide 2x more compact data representation than single-precision format, resulting in a reduction in application data size and memory bandwidth needs. More on the instructions, and applicable uses, can be found here.
  • Interrupt/APIC Virtualization decreases the overhead in the handling of instruction interrupts in the core, and eliminates the need for virtual machines to wait for thousands of instruction cycles per exit; these results in performance benefits on many I/O operations. Contact your VMM provider to find out when they will include support for this feature. Here is a study we've done on how it performs.

 Learn more about the Intel® Xeon® Processor E7 v2  family here

Case Studies

Solution Briefs

(more can be found on

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

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