The Intel® Composer XE 2013 for Linux suite includes the Intel® Threading Building Blocks (Intel® TBB) library which includes support for the Intel® Xeon Phi™ coprocessor . Intel® TBB is one of many options available for you to parallelize your application. TBB is a popular form of threading parallelism implemented by a C++ template library. We do not cover details on Intel TBB use on Intel® Xeon Phi™ coprocessors in this document. This information is covered in separate documentation included with the compiler and available online.
Intel® Threading Building Blocks (Intel® TBB) is a widely used C++ template library for creating scalable parallel applications. Using Intel TBB, developers can easily develop robust task-based parallel applications that abstract platform details and threading mechanisms to provide performance improvement. Who should be interested in Intel TBB? If you are a C++ programmer and confident in the use of template libraries, this is an ideal choice for parallelization. Properties of Intel TBB:
Open your "Getting Started" document and scroll down to find a link to "Intel® Threading Building Blocks Documentation". You can also directly access this information with your installed product. This includes a Getting Started guide, Documentation, a Class Hierarchy Documentation, Examples, and Release Notes.The Intel TBB documentation is also available at https://software.intel.com/en-us/tbb_4.2_doc.
Intel TBB is an ideal parallelization model for the C++ programmer familar with template libraries and use.
It is essential that you read this guide from start to finish using the built-in hyperlinks to guide you along a path to a successful port and tuning of your application. The paths provided in this guide reflect the steps necessary to get best possible application performance.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804