Pin - A Dynamic Binary Instrumentation Tool

By Osnat Levi,

Published:06/13/2012   Last Updated:06/25/2018

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Overview

Pin is a dynamic binary instrumentation framework for the IA-32, x86-64 and MIC instruction-set architectures that enables the creation of dynamic program analysis tools. Some tools built with Pin are Intel® VTune™ Amplifier, Intel® Inspector, Intel® Advisor and Intel® Software Development Emulator (Intel® SDE). The tools created using Pin, called Pintools, can be used to perform program analysis on user space applications on Linux*, Windows* and macOS*. As a dynamic binary instrumentation tool, instrumentation is performed at run time on the compiled binary files. Thus, it requires no recompiling of source code and can support instrumenting programs that dynamically generate code.

Pin provides a rich API that abstracts away the underlying instruction-set idiosyncrasies and allows context information such as register contents to be passed to the injected code as parameters. Pin automatically saves and restores the registers that are overwritten by the injected code so the application continues to work. Limited access to symbol and debug information is available as well.

Pin was originally created as a tool for computer architecture analysis, but its flexible API and an active community (called "Pinheads") have created a diverse set of tools for security, emulation and parallel program analysis.


Licensing

Pin is proprietary software developed and supported by Intel and is supplied free of charge for non-commercial use. Pin is given under the End User License Agreement for the Intel ® Software Development Products, section 2.2 License for Noncommercial License Types. Pin includes the source code for a large number of example instrumentation tools like basic block profilers, cache simulators, instruction trace generators, etc. It is easy to derive new tools using the examples as a template.


Getting Started

The best way to get started is to read the user's manual. Pin developers also regularly organize tutorials and workshops. They are held at conferences and universities.


Technical Support

If you have specific questions after reading the user's manual, you should first check the FAQ page. If that doesn't answer your question, you can search through the archives of the Pinheads newsgroup to see if anyone else asked your question. Finally, if that doesn't solve your problem, feel free to post a message to the newsgroup (don't forget to include your Pin kit number, operating system, processor, and gcc version).


User's Manual


Tutorials

  • CGO 2013 [PDF 3.464MB] (February 2013, Shenzhen, China)
  • CGO 2012/ISPASS 2012 [PPT 6.7MB] (April 2012 - San Jose, CA and New Brunswick, NJ)
  • CGO 2011 [PPT 10.5MB] (April 2011, Chamonix, France)
  • CGO 2010 [PPT 7MB] (April 2010, Toronto, Canada)
  • Academia Sinica 2009 (May 2009 - Taipei, Taiwan) - Part 1 [PPT 469KB] and Part 2 [PPT 299KB]
  • ISCA 2008 (June 2008 - Beijing, China) - Part 1 [PPT 469KB] and Part 2 [PPT 220KB]
  • ASPLOS 2008 (March 2008 - Seattle, WA) - Slides [PPT 409KB] and Hands On [PDF 365KB] materials
  • PLDI 2007 (June 2007 - San Diego, CA) - Slides [PDF 5.601MB]

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804