The -check-pointers switch, which enables the Pointer Checker feature available in Intel® Parallel Studio XE 2016, cannot be used with the -static flag on Linux* (/MT on Windows*) which forces all Intel libraries to be linked statically. The reason is that, by design, the Pointer Checker library “libchkp.so” must be shared by all executables and libraries in a process without duplication. While it is certainly possible to ensure, manually, that only a single library copy is linked, we found in testing that it was quite easy for users to accidentally include multiple copies of the library, causing unpredictable runtime errors. For this reason, we do not allow use of -static (or /MT) with Pointer Checker.
If the Linux system linker “ld” is used to link programs that have been compiled with -check-pointers, the libchkp.so and libchkpwrap.a libraries must be included. They are typically found in the /opt/intel/composerxe/lib/intel64 or ia32 directories. Or, if the “icc” or “icpc” compiler drivers are used to link, these libraries will be automatically included if the “-check-pointers:rw” or “-check-pointers:write” switches is used.
icc -o executable -check-pointers:rw a.o b.o c.o
ld -o executable a.o b.o c.o -L/opt/intel/composerxe/lib/intel64 -lchkp -lchkpwrap
If program code that is compiled with -check-pointers, calls code that is not compiled with -check-pointers, and the callee code may modify pointers in the caller, the compiler will make conservative assumptions and inaccurate results may occur. Therefore it is strongly recommended that related program units all be compiled with the same Pointer Checker options. Typical C and C++ library calls such as memcpy(), new, etc. are converted by the compiler to Pointer Checker compatible versions automatically, and do not need special treatment.
Note: With –static-intel switch, the compiler will just link in the dynamic Pointer Checker run time libraries (issuing a message to that effect) while the use of -static option will error out at link time.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804