Tuning Guides and Performance Analysis Papers

By David L. Anderson, Alexandra Marie Shinsel

Published:05/06/2019   Last Updated:03/28/2019

Our tuning guides explain how to identify common software performance issues using Intel® VTune™ Amplifier and give suggestions for optimization.

Microarchitecture Code Name Processors Covered Tuning Guide
Cascade Lake Intel® Xeon Processor Scalable Family 2nd Gen Download PDF
Apollo Lake Intel Atom® Processor E3900 Series, and Intel® Pentium® and Celeron® Processor N- and J-Series Download PDF
Skylake-X Intel® Xeon Processor Scalable Family 1st Gen Download New PDF
Download Old PDF
Knights Landing Intel® Xeon Phi™ Processor Download PDF
Broadwell-E* (Server) Intel® Xeon Processor E5 v4 Family Download PDF
Skylake 6th Generation Intel® Core™ Processor Family Download PDF
Broadwell 5th Generation Intel® Core™ Processor Family Download PDF
Haswell-E* (Server) Intel® Xeon® Processor E5 v3 Family Download PDF
Ivy Bridge-E* (Server) Intel® Xeon® Processor E5/E7 v2 Family Download PDF
Haswell 4th Generation Intel® Core™ Processor Family Download PDF
Sandy Bridge-EP/EX/EN (Server) Intel® Xeon® Processor E5 Family Download PDF
Ivy Bridge 3rd Generation Intel® Core™ Processor Families Download PDF
Sandy Bridge 2nd Generation Intel® Core™ Processor Families Download PDF
Many Integrated Core Architecture Intel® Xeon Phi™ coprocessor Read the Article

The whitepaper How to Tune Applications Using a Top-Down Characterization of Microarchitectural Issues is a useful companion to any of the tuning guides.

Read the article Understanding How General Exploration (or Microarchitecture Exploration in the latest product versions) Works in Intel® VTune™ Amplifier for information on the technology and mechanisms behind General Exploration and some of the complexities associated with this analysis.

Other processor-specific papers:

For microarchitectural details, including events, programming the event counters, and the Software Optimization Reference Manual, please see the Intel® 64 and IA-32 Architectures Software Developer Manuals.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804