Software Enabling for Memory Bandwidth Monitoring in the Intel® Xeon® Processor E5 v4 Family

By Khang T Nguyen, Published: 02/11/2016, Last Updated: 02/11/2016


This article describes software support available for the Memory Bandwidth Monitoring (MBM) feature. Prior blogs in this series have included an overview of the MBM feature and architecture and usage models, and detailed examples of proof points.

MBM is part of a larger series of technologies called Intel® Resource Director Technology (Intel® RDT). More information on the Intel RDT feature set can be found here, and an animation illustrating the key principles behind Intel RDT is posted here.

MBM Software Support

As described in the Cache Monitoring Technology (CMT) software enabling article, two approaches are possible for software enabling of the monitoring features: either pinning RMIDs to hardware threads then affinitizing applications to those threads, or enabling the OS/VMM scheduler, which then keeps Resource Monitoring IDs (RMIDs) up to date on threads at swap-on, enabling threads to migrate and provides better flexibility.

A number of operating systems/VMMs have been enabled to support MBM via scheduler and infrastructure changes, including the Linux* kernel (support is trending into version 4.6-rc1). Specific examples include the following:

The Intel® Resource Director Technology utility from (and GitHub*) also provides real-time monitoring metrics for CMT and MBM, and the utility works with generic Linux* operating systems and the read/write Model-Specific Register Tools package to provide per-thread monitoring and control via associating RMIDs and Classes of Service (CLOS) with each hardware thread. An example of the output of this utility is shown in the proof points article.


This article provided an overview of initial software support for the MBM feature. Additional software support work is in progress, and updates will be posted as they are available.

Prior articles in this series include details including an overview of the MBM feature and architecture and usage models, and detailed examples of proof points.


Product and Performance Information


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