The TensorFlow* image classification sample codes below describe a step-by-step approach to modify the code in order to scale the deep learning training across multiple nodes of HPC data centers. The detailed descriptions of each step are part of a separate article that is going to be published.
All samples are based on original samples from the TensorFlow* repository.
The samples were tested on a CentOS* 7 installation with an Intel optimized TensorFlow* version 1.10 that makes use of the Intel® Math Kernel Library for Deep Neural Networks (Intel® MKL-DNN) library along with the Horovod* framework.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804