What's New in Intel® System Studio 2018 Beta

Published: 07/31/2017, Last Updated: 09/27/2017

This page provides the information on the new features of the Intel® System Studio 2018 Beta product.

To get product updates, log in to the Intel® Software Development Products Registration Center.

For questions or technical support, visit Intel® Software Products Support.

You can register and download the Intel® System Studio 2018 Beta package  here

Intel® System Studio 2018 Beta is released with new features and capabilities that help embedded and system developers develop embedded solutions faster. Now developers can speed time to market and boost power efficiency, performance, and reliability for intelligent systems, embedded devices and applications running on Intel processor-based platforms.

Top Features in Intel® System Studio 2018 Beta

Advanced debug, trace and analysis features and reports help developers find and fix issues and optimize code. Compilers and libraries provide innovative features and improved performance for high-demand computing tasks, including image, machine learning, storage, communications, transportation usages and more. Multiple usability improvements, workflow enhancements, and new tutorials make development easier.

The 2018 Beta version supports the latest Intel® processor-based platforms and offers multiple editions to meet developer needs. This comprehensive tool suite helps streamline development so developers can move from prototype to production faster, and works together with other Intel software tools and SDKs so developers can further innovate unique, competitive features. 

Below are details on just a few top new features. You can find more information in the individual component release notes.


Eclipse* IDE for Intel® System Studio 2018

  • Created an Intel flavor of the Eclipse* IDE for Intel® System Studio 2018
  • Created modular Eclipse IDE structure for contribution to the Intel® System Studio product
  • Integrated Intel® System Studio for IoT Edition into Intel® System Studio 2018
  • Improved remote Linux* OS target support 
    • Added Eclipse* Target Communication Framework support for target connection
    • Added basic Makefile support
    • Implemented running out of box docker solution for Windows based on QEMU
  • Added wizards for Intel® C++ Compiler integration
    • Added local compiler integration for Linux hosts
    • Added cross-compilation integration with support for Linux and Android* OS targets
  • Improved general Intel® System Studio user experience
    • Custom perspectives for Intel® System Studio
    • Implemented wizards focusing on Intel® System Studio use cases
    • Disabled unsupported wizards

For help creating your first cross compiling project see this article: Cross Development

Intel® C++ Compiler 18.0 Beta

  • Control-Flow Enforcement Technology(CET) support
  • New option -Qimf-use-svml to enforce short vector math library(SVML)
  • Compile-time dispatching for SVML calls
  • All -o* options replaced with -qo* options
  • Support of hardware based Profile Guided Optimization (PGO)
  • Features from OpenMP* TR4 Version 5.0 Preview 1
  • Support for more new features in OpenMP* 4.0 or later
  • New C++17 features supported
  • Support for the atomic keyword introduced in C++11
  • New option –qopt-zmm-usage that defines the level of ZMM registers usage

GNU* GDB and source

  • Added visualizer for PKeys hardware register and GS_base and FS_base system registers in Linux.
  • Added Python* call backs for Intel® Processor Trace.

Intel® Integrated Performance Primitives 2018 (Intel® IPP)

  • Added new functions to support LZ4 data compression and decompression.
  • Added patch files for the GraphicsMagick* source to provide drop-in optimization with Intel® IPP functions.
  • Removed the cryptography code dependency on the main package.
  • Extended support of Platform-Aware APIs, which provide 64-bit parameters for image dimensions and vector length.

Intel® Math Kernel Library 2018 (Intel® MKL)

  • BLAS Features
    • Introduced 'compact GEMM' and 'compact TRSM' functions to work on groups of matrices and added service functions to support the new format.
    • Introduced optimized integer matrix-matrix multiplication routine to work with quantized matrices for all architectures.
  • BLAS Optimizations
    • Optimized GEMM_S8U8S32 and GEMM_S16S16S32 for AVX2, and AVX512 based on Intel® Advanced Vector Extensions 512 (Intel® AVX-512) with support of AVX512_4FMAPS and AVX512_4VNNIW instruction groups.
  • Deep Neural Network
    • Added support for non-square pooling kernels.
    • Optimized conversions between plain (nchw, nhwc) and internal data layouts.
    • Added improvements and optimizations for small matrices (N<16)
    • Added ?gesvd, ?geqr/?gemqr, ?gelq/?gemlq optimizations for tall-and-skinny and short-and-wide matrices.
    • Added optimizations for ?pbtrsroutine
    • Added optimizations for ?potrf routine for Intel® Threading Building Blocks (Intel® TBB) layer.
    • Added optimizations for CS decomposition routines:?dorcsd and?orcsd2by1.
    • Introduced factorization and solve routines based on Aasen's algorithm:?sytrf_aa/?hetrf_aa, ?sytrs_aa/?hetrs_aa.
    • Introduced new (faster)_rk routines for symmetric indefinite (or Hermitian indefinite) factorization with bounded Bunch-Kaufman (rook) pivoting algorithm.
    • Added optimizations (2-stage band reduction) for p?syevr/p?heevr routines for JOBZ=’N’ (eigenvalues only) case
  • FFT
    • Introduced Verbose support for FFT domain, which enables users to capture the FFT descriptor information for Intel MKL
    • Improved performance for 2D real-to-complex and complex-to-real matrix multiplication for Intel® Xeon® processors supporting Intel® Advanced Vector Extensions 512 (Intel® AVX-512)
    • Improved performance for 3D complex-to-complex for Intel® Xeon® Processor supporting Intel® Advanced Vector Extensions 512 (Intel® AVX-512)
  • Intel Optimized High Performance Conjugate Gradient Benchmark
    • New version of benchmark with Intel® MKL API
  • Sparse BLAS
    • Introduced Symmetric Gauss-Zeidel preconditioner.
    • Introduced Symmetric Gauss-Zeidel preconditioner with ddot calculation of resulted and initial arrays.
    • Sparse Matvec routine with ddot calculation of resulted and initial arrays.
    • Sparse Syrk routine with both OpenMP and Intel® Threading Building Blocks (Intel® TBB) support.
    • Improved performance of Sparse MM and MV functionality for Intel® AVX-512 Instruction Set.
  • Direct Sparse Solver for Cluster
    • Add support of transpose solver
  • Vector Mathematics
    • Added 24 functions including optimizations for processors based on Intel® Advanced Vector Extensions 512 (Intel® AVX-512).
  • Data Fitting
    • Cubic spline-based interpolation in ILP64 interface was optimized up to 8x times on Intel® Xeon® Processor supporting Intel® Advanced Vector Extensions 512 (Intel® AVX-512).

Intel® Threading Building Blocks 2018 (Intel® TBB)

  • this_task_arena::isolate() function is now a fully supported feature. Also, this_task_arena::isolate() function and task_arena::execute() methods were extended to pass on the value returned by the executed functor (this feature requires C++11). The task_arena::enqueue() and task_group::run() methods extended to accept move-only functors.
  • Added support for Android* NDK r15, r15b.
  • Added support for Universal Windows Platform.

Intel® Data Analytics Acceleration Library (Intel® DAAL)

  • Introduced API modifications to streamline library usage and enable consistency across functionality.
  • Introduced support for Decision Tree for both classification and regression. The feature includes calculation of Gini index and Information Gain for classification, and mean squared error (MSE) for regression split criteria, and Reduced Error Pruning.
  • Introduced support for Decision Forest for both classification and regression. The feature includes calculation of Gini index for classification, variance for regression split criteria, generalization error, and variable importance measures such as Mean Decrease Impurity and Mean Decrease Accuracy.
  • Introduced support for varying learning rate in the Stochastic Gradient Descent algorithm for neural network training.
  • Introduced support for filtering in the Data Source including loading selected features/columns from CSV data source and binary representation of the categorical features
  • Extended Neural Network layers with Element Wise Add layer.
  • Introduced new samples that allow easy integration of the library with Spark* MLlib
  • Introduced service method for enabling thread pinning;Performance improvements in various algorithms on Intel® Xeon® Processor supporting Intel® Advanced Vector Extensions 512 (Intel® AVX-512) (codename Skylake Server)

For more information on Intel® DAAL see this article: Introduction to Intel® DAAL 

MRAA & UPM Libraries

  • Over 400 sensor and actuator libraries included, with a built-in GUI for exploring the repository
  • Support for these libraries included for Ubuntu*, Wind River* Linux*, and Wind River* Pulsar*
  • Additional samples included which show how to leverage MRAA and UPM in combination with various cloud services

Intel® VTune™ Amplifier 2018 

  • Easier Analysis of Remote Linux Systems
    • Automated install of Intel® Vtune™ Amplifier collectors on a remote Linux target
  • Enhanced Python* Profiling
    • Locks and Waits analysis tunes threaded performance of mixed Python* and native code
    • Preview: Memory consumption analysis. Python*, C, C++.
  • Optimize Private Cloud-Based Applications 
    • Profile inside Docker & Mesos containers
    • Attach to running Java services and daemons
  • Media Developers: GPU In-kernel Profiling
    • Analyze GPU kernel execution to find memory latency or inefficient kernel algorithms
  • Easier Threading Optimization of Applications Using Intel® TBB
    • Advanced threading analysis extends classification of high overhead and spin time 
  • Latest Processors
    • New Intel® processors including Intel® Xeon® Scalable Processor (codenamed Skylake-SP)
  • Cross OS Analysis for All Supported OSs
    • Download other OSs as needed.  e.g., collect data on Linux, then analyze it on Windows or macOS.

Energy Analysis/Intel® SoC Watch

  • Added Eclipse Plugin for Intel® SoC Watch for Linux* target

Intel® Inspector 2018

  • Support for C++17 std::shared_mutex and Windows SRW Locks, that enable threading error analysis for applications with read/write synchronization primitives.
  • Support for cross-OS analysis to all license types. The installation packages for additional operating systems can be downloaded from registrationcenter.intel.com.
  • Microsoft Visual Studio 2017* integration and support.

Intel® Graphics Performance Analyzers

  • DX12 Feature Pack 4; OpenGL 1.X-4.1 support on macOS 

Intel® System Debugger 2018

  • Added new method for connecting to target systems, called: Target Connection Agent (TCA)
  • Support for “Intel Atom® Processor C3xxx (Denverton)” target added for both Windows and Linux hosts
  • Support for “Intel Xeon® Scalable Processor (Skylake-SP) / Intel® C620 Series chipset (Lewisburg)” target added for Windows host

See also: Using the Target Connection Agent (TCA) with Intel® System Debugger

Intel® Debug Extensions for WinDbg*

  • WinDbg* support Windows Driver Kit (WDK) version 1703. Added support for a new eXDI callback (DBGENG_EXDI_IOCTL_V3_GET_NT_BASE_ADDRESS_VALUE) to locate windows key structure KdVersionBlock.
  • Extended Intel® Debug Extensions for WinDbg* for Intel® Processor Trace plugin to support Windows public symbol information.
  • Extended Intel® Debug Extensions for WinDbg* for Intel® Processor Trace plugin to support ring 3 tracing.
  • Extended Intel® Debug Extensions for WinDbg* for Intel® Processor Trace plugin to support decoding Intel® Processor Trace data from crash dump.


Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

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