FAT Binary Created for Windows* Static (.lib) and Dynamic-Link (.dll) Library Containing Intel® Xeon Phi™ Coprocessor Offload Code

Published:08/22/2014   Last Updated:08/22/2014

The Intel® Parallel Studio XE 2015 Composer Editions for Windows* have an internal implementation feature enhancement enabling the Intel® 15.0 compilers to create a FAT binary file for the Windows* Static library (.lib) and Windows* Dynamic-Link library (.dll) when using the Intel® Language Extensions for Offload or OpenMP* 4.0 target constructs.

The enhancement provides the application developer further transparency of Intel® Xeon Phi™ coprocessor support when using the Intel® Language Extensions for Offload or OpenMP* 4.0 target constructs within a Windows* Static (.lib) or Windows* Dynamic-Link (.dll)  library application.

The enhancement also provides improved application developer usability by lessening requirements to handle only a single combined FAT Binary (.lib) or .dll file. Previous releases required handling of the paired Windows* Static library (.lib) and associated Linux* Static archive (.a), or the Windows* Dynamic-Link library (.dll) and associated Linux* Dynamic-shared (.so) library files.

On a related note, the tool for manipulating the Fat binary and object files is offload_extract. The Offload Extract tool is a standalone tool that extracts embedded target objects from fat objects and embedded target binaries and libraries from fat executables on Windows* and Linux* systems.

This feature enhancement is available in both the C++ and Fortran Intel® 15.0 compilers.

Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804