Colfax Is offering free Web-based workshops on Parallel Programming and Optimization for Intel® Architecture, including Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors. Workshops include 20 hours of Web-based instruction and up to 3 weeks of remote access to dedicated training servers for hands-on exercises. Workshops beginning on September 9 and October 13 are free to everyone thanks to Intel’s sponsorship.
The Colfax Hands On Workshop (HOW) training series is an integral part of the Intel Modern Code Developer program which supports developers in leveraging application performance in code through a systematic optimization methodology.
Attendees of these workshops may receive a certificate of completion. The certificate states the Fundamental level of accomplishment in the Parallel Programming Track. Attending at least 6 out of 10 live broadcast sessions is required to receive the certificate.
Check out this link for more details and to register.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804