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Intel® Threading Building Blocks (Intel® TBB)

Intel® Threading Building Blocks (Intel® TBB)
is a high-level parallel programming framework for C++ code that uses a template-based runtime library to help you harness the performance of multi-core processors.
Intel TBB
lets you specify logical parallelism instead of threads. You specify potential parallelism - what can be run in parallel. The library decides the actual parallelism at run-time, matching it to the available hardware. The library has templates that simplify using high level parallel patterns such as parallel loops.
Intel TBB
programs are implemented by a library that has been ported to multiple C++ compilers.
Use
Intel TBB
to write scalable programs that:
  • Specify parallel work instead of managing threads.
  • Emphasize data parallel programming.
  • Take advantage of high-level parallel patterns.
Intel TBB
consists of header files and shared libraries, so it can be used with any C++ compiler.
Intel recommends that you consider using
Intel TBB
for introducing parallelism into C++ programs. It has a small cost of entry and provides excellent initial performance with a lot of additional capabilities that can be used for future refinements.
It also has many powerful features that can make it possible to easily parallelize more places in your application. These features include:
  • Parallel algorithmic patterns
  • Concurrency-friendly containers
  • Scalable memory allocation
  • Synchronization primitives
  • Timing

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804