User Guide

  • 2020
  • 06/18/2020
  • Public Content
Contents

OpenMP Critical Sections

Use OpenMP critical sections to prevent multiple threads from accessing the critical section's code at the same time, thus only one active thread can update the data referenced by the code. Critical sections are useful for a non-nested mutex.
Unlike OpenMP atomic operations that provide fine-grain synchronization for a single operation, critical sections can provide course-grain synchronization for multiple operations.
Use:
  • #pragma omp critical
    with C/C++.
  • !$omp critical
    and
    !$omp end critical
    with Fortran.
If the optional
(name)
is omitted, it locks an unnamed global mutex. The easiest approach is to use the unnamed form unless this shared mutex is causing unacceptable performance delays.
For example, consider this annotated C/C++ serial program:
int count; void Tick() { ANNOTATE_LOCK_ACQUIRE(0); count++; ANNOTATE_LOCK_RELEASE(0); } . . .
The parallel C/C++ code after adding
#include <omp.h>
and
#pragma omp critical
:
#include <omp.h> //prevents a load-time problem with a .dll not being found int count; void Tick() { // Replace Lock annotations #pragma omp critical count++; } . . .
Consider this annotated Fortran serial code:
program ABC integer(kind=4) :: count = 0 . . . contains subroutine Tick call annotate_lock_acquire(0) count = count + 1 call annotate_lock_release(0) end subroutine Tick . . . end program ABC
The parallel Fortran code after adding
use omp_lib
,
!$omp critical
, and
!$omp end critical
:
program ABC use omp_lib integer(kind=4) :: count = 0 . . . contains subroutine Tick !$omp critical count = count + 1 !$omp end critical end subroutine Tick . . . end program ABC

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804