User Guide


Incidental Sharing

Sharing is
when tasks use the same memory location, but do not communicate any information using it.

The Basic Pattern

Suppose that a task always writes to a memory location before reading from it, and that the value that it writes is not read again outside the task. For example:
extern int x; // ... ANNOTATE_SITE_BEGIN(site1); for (i = 0; i != n; ++i) {     ANNOTATE_ITERATION_TASK(task1);     x = a[i];     b[i] = x * b[i]; } ANNOTATE_SITE_END(site1);
The variable
is both read and written in the task, so there will be a sharing problem when multiple copies of the task execute at the same time. For example:
  1. Task 0 sets
  2. Task 1 sets
  3. Task 0 computes
    x * b[0]
What is interesting is that the sharing is incidental to the logic of the program. Each iteration of the loop uses
, but its use in each iteration is totally independent. Memory locations used in this way are called
, because giving each task its own private memory location will eliminate the sharing without changing the program behavior.

Memory Allocators

The use of dynamically allocated memory is a special case of incidental sharing. Consider this task:
ANNOTATE_TASK_BEGIN(task2); Type *ptr = allocate_Type(); // some code that uses the object pointed to by ptr free_Type(ptr); ANNOTATE_TASK_END();
returns the same address to one task that was used and freed by another task, then those tasks will both access the same memory location, but the sharing is incidental. The memory allocator will never return a pointer to memory that has been allocated and not freed, so the tasks will not use the same dynamically allocated memory location at the same time, and the appearance of sharing is an illusion.
The Dependencies tool understands the standard memory allocators such as C/C++
, but it does not know about any custom memory allocators that your program might have. If your code has custom memory allocators, you can mark their uses with the special-purpose C/C++ annotations

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804