User Guide


Verify Whether Incidental Sharing Exists

Sharing is incidental only if the task writes to the memory location before any read of the memory location
anywhere in the dynamic extent of the task
. This is easy to check when the task is a few lines of code in a single function. It is much harder when the task is hundreds or thousands of lines of code, and involves calls to many functions in many source files.
Even worse, the sharing is not incidental if any code that might execute after the task completes, or in any other task that might run at the same time as the task, could read a value written by the task to that memory location.
There is no "magic bullet" to prove that the requirements are met, but there is a simple technique that you might find useful. Add statements that write a known bad value into the memory location immediately after the
, and then test your serial program. If the sharing is incidental, these assignments will have no effect. If  not, there is a good chance that the changes will change the program behavior. Of course, the effectiveness of this technique depends on how good your test system is at detecting the resulting bugs.
For example, if you want to confirm that the variable
is incidentally shared in
extern int x; // ... ANNOTATE_SITE_BEGIN(site1); for (i = 0; i != n; ++i) {     ANNOTATE_ITERATION_TASK(task1);     x = 0xdeadbeef;     the_task();     x = 0xdeadbeef; } ANNOTATE_SITE_BEGIN();
To identify stray memory references, consider using the C/C++ special-purpose annotations

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804