User Guide


Dependencies and Memory Access Patterns Analyses

Refinement Reports Purpose and Usage

Intel Advisor
offers two
  • Dependencies analysis (optional) -
    For safety purposes, the compiler is often conservative when assuming data dependencies. Run a Dependencies analysis to check for real data dependencies in loops the compiler did not vectorize because of assumed dependencies. If real dependencies are detected, the analysis can provide additional details to help resolve the dependencies. Your objective: Identify and better characterize real data dependencies that could make forced vectorization unsafe.
  • Memory Access Patterns (MAP) analysis (optional) -
    Run a MAP analysis to check for various memory issues, such as non-contiguous memory accesses and unit stride vs. non-unit stride accesses. Your objective: Eliminate issues that could lead to significant vector code execution slowdown or block automatic vectorization by the compiler.

Refinement Reports Regions

  • Filters pane -
    Filter analysis data by a variety of criteria, such as module, loop/function, and vectorized/non-vectorized.
  • Loop Information pane -
    View integrated Memory Access Patterns and Dependencies analysis data.
  • Advanced View pane - includes the following tabs:
    • Memory Access Patterns Report tab -
      View information about types of memory access inside selected loops/functions.
      Vectorization Advisor
    • Dependencies Report tab -
      View any predicted data sharing problems and informational remark messages.
    • Recommendations tab - provides memory-specific recommendations.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804