User Guide

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Issue: Const Reference to a Host Pointer Used to Initialize a Buffer

When porting applications from C++ to DPC++, these issues may be implicitly present. The convention for passing arguments to a function is defined in C++. If a function requires read-only parameters, they are sent in as const references and any parameter that has to be used for read-write will be without a const. This causes a secondary issue in DPC++ algorithms if these const references are used by the algorithm to construct buffers. Since the type of access required to use this data is not known at the time of construction of the buffer, the
Intel® oneAPI DPC++/C++ Compiler
is conservative and creates copies of const references while creating the buffers. If these are large arrays, the cost incurred is not trivial. This issue only affects the CPU device as everything is communicated through shared memory and the copying of data pointer to the host pointer is not necessary.
The
va_const.cpp
example demonstrates such an issue and indicates buffer copy in the application that needs to be looked at.
To eliminate this copy, you should change the code sample in the following way:
// Old code: // The function prototype passed in the read-only buffers as const, which is the // recommended practive in C++ // // void vec_add(queue &q, const float A[], const float B[], ...) { void vec_add(queue &q, float A[], float B[], float C[], const int size) { ... }
The recommended practice in C++ is to pass in read-only parameters as const values. However, this causes the
Intel® oneAPI DPC++/C++ Compiler
to be conservative and create a copy. If you are porting C++ code to DPC++, the static rule-check should help you identify such issues in your application.

Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804