User Guide

Contents

Call Tree Graphical Representation

The
program_tree.pdf
file is a graphical representation of the application call tree.
  • Circles
    represent loops and functions.
  • Dotted circles
    represent loops and functions excluded from analysis. This usually happens usually because of missing information, or because something prevents their direct offload. Each dotted circle includes a reason why this loop or functions was not analyzed.
  • Dotted rectangle regions
    represent offloadable regions, which are candidates for offloading to a target device.
  • Rectangle regions with grey background
    represent accelerated regions, which are optimal offloads within offloadable regions. These grey rectangles also list metrics for each particular offload, such as original execution time, execution time on a target device, estimated speedup.
The figure below shows a selected fraction of a complete file. In this section, there are three offload regions marked by grey boxes. All three regions correspond to triply-nested loops. The offload region number 13 (on the right) comes from the file
stream.cpp
, while the other two come from the file
collision.cpp
. Focusing on the region on the right of the figure, you can see the following reported metrics:
  • The speedup for this region's offload is 31x.
  • The loop nest head is at line 21.
  • The child loops start at lines 22 and 26 respectively.
Similar information is available for all the marked regions.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804