User Guide


data-transfer-page-size (Beta)

Specify memory page size to set the traffic measurement granularity for the data transfer simulator.


is a power-of-two value in range of 4 to 8192: 4 | 8 | 16 | 32 | 64 | 128 | 256 | 512 | 1024 | 2048 | 4096 | 8192
Actions Modified
=tripcounts --enable-data-transfer-analysis
This option is available only in the
Intel® Advisor Beta
, which is part of
Intel® oneAPI Base Toolkit
. For more information, see
Run a Trip Counts and FLOP analysis. Enable data transfer simulation with 512-bites memory page size .
$ advixe-cl --collect=tripcounts --project-dir=./advi --flop --enable-data-transfer-analysis --data-transfer-page-size=512 -- myApplication

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804