User Guide

Contents

mark-up-list

After running a Survey analysis and identifying loops of interest, select loops (by file and line number or ID) for deeper analysis.

Syntax

--mark-up-list
=
<string>
Arguments
<string>
is a comma-separated list (no spaces) of loop IDs, file/line numbers in the format
file1:line1
, or both.
Default
The existing selection in
Survey
, which is persistent.
If there is no GUI selection:
  • For Trip Counts & FLOP and Roofline analyses: all loops
  • loops
    default
    • For Memory Access Patterns analysis:
      "loop-height=0,total-time>0.1"
    • For Dependencies analysis:
      "scalar,loop-height=0,total-time>0.1"
Actions Modified
collect
=tripcounts
collect
=map
collect
=dependencies
collect
=roofline
Usage
Do not confuse the
mark-up-loops
action with the
mark-up-list
action option. The
mark-up-loops
action coupled with the
select
action option enables a GUI checkbox; therefore loop selection persists beyond the duration of the
mark-up-loops
action and applies to downstream analyses, such as Dependencies and Memory Access Patterns analyses. The
collect
action coupled with the
mark-up-list
action option simulates enabling a GUI checkbox; therefore loop selection persists only for the duration of the
collect
action.
  1. Run a Survey analysis.
  2. Run a Trip Counts & FLOP analysis on Survey analysis loops 1 and 3; and source location
    my_source.cpp:132
    .
$ advixe-cl --collect=survey --project-dir=./myAdvisorProj -- ./bin/myTargetApplication $ advixe-cl --collect=tripcounts --project-dir=./advi -–mark-up-list=1,my_source.cpp:132,3 --search-dir src:=./src -- myApplication

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804