User Guide



Restructure the call flow during Survey analysis to attach stacks to a point introducing a parallel workload.


On (stack-stitching)
Actions Modified
The option restores a logical call tree for
Intel® Threading Building Blocks (Intel® TBB)
or OpenMP* applications by catching notifications from the runtime and attaching stacks to a point introducing a parallel workload.
Disable when Survey analysis runtime overhead exceeds 1.1x
Disabling can decrease collection overhead and significantly decrease finalization overhead depending on workload.
Run a Survey analysis. Disable stack stitching.
$ advixe-cl --collect=survey --project-dir=./myAdvisorProj --no-stack-stitching -- ./bin/myTargetApplication

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804