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One Task Instance in Parallel Site

Occurs when a parallel site was executed but annotations for only one task instance were executed in the dynamic extent of the active parallel site. This may be the expected behavior, or it may indicate an error in the placement of annotations or a data set that is not well suited for parallelism.
ID
Code Location
Description
1
Parallel site
Represents the location and associated call stack of the parallel site. Occurs when a parallel site was executed but annotations for only one instance of a task's code were executed in the dynamic extent of the active parallel site. The warning is based on the site and task annotations detected during program execution. This may be the expected behavior. In other cases, this warning may indicate an error in the placement of annotations or a data set that is not well suited for parallelism (a single instance of a task may not contribute to parallel execution speed-up).
int global; extern arg_map parse_args(int argc, char ** argv); void main(int argc, char * argv[]) { int x; parse_args(argc, argv); int y = arg_map.get(“iterations”); //command line specifies 1 iteration     ANNOTATE_SITE_BEGIN(loopsite); // Parallel site for (x=0; x<y; x++) { ANNOTATE_ITERATION_TASK(task); … }     ANNOTATE_SITE_END(); }
In this example, the selected data set results in only a single iteration of the loop. No dependencies will be found between multiple iterations of the loop.
Some Possible Correction Strategies
Check the execution paths within the parallel site and confirm that you intended to have only one task for this parallel site. If needed, examine the loop structure and its scaling characteristics (reported by the Suitability tool) to ensure that this parallel site does not need additional tasks. If the problem is caused by using too small a data set, increase the size of your data set.

Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804