User Guide

Contents

Choosing
Modeling Parameters in the Suitability Report

The Suitability Report lets you adust modeling parameters based on possible application needs. When using an active result, you can adjust modeling parameters and quickly view the likely impact on the predicted performance interactively.
This screen shows data based on a
Target System
of
CPU
. The screen shown on your system may differ. If you use other
Target System
values for the
Intel® Xeon Phi™
processor, additional modeling values appear. See sections Data and Modeling Parameters When the Target System is
Intel® Xeon Phi™
or Data and Modeling Parameters When the Target System is Offload to
Intel® Xeon Phi™
within the Suitability Report Overview topic.
The top row of modeling parameters provides drop-down lists that let you define the likely hardware configuration of target systems as well as the high-level parallel framework. These values let you predict the likely performance characteristics for the selected parallel site.
  • Use the
    Target System
    to select the type of hardware configuration to be analyzed:
    CPU
    ,
    Intel Xeon Phi
    , or
    Offload to Intel Xeon Phi
    . The latter two apply to the
    Intel Xeon Phi
    processor system.
  • Use the
    Threading Model
    to choose the high-level parallel framework to be used, such as OpenMP* or
    Intel® Threading Building Blocks (Intel® TBB)
    .
  • Use
    CPU Count
    to specify the number of CPUs to model. To specify the default
    CPU
    count by setting the Options value.
  • If you choose a
    Target System
    of
    Intel Xeon Phi
    , or
    Offload to Intel Xeon Phi
    , use the
    Coprocessor Threads
    to choose the number of
    Intel Xeon Phi
    coprocessor threads.
As you modify these modeling parameters, the predicted performance estimates are updated automatically. Repeat as needed.
If your target app contains multiple parallel sites, select each parallel site you wish to examine. When you select a different parallel site, the predicted performance estimates for that site are updated automatically. Repeat as needed for each site.
Use the
Loop Iterations (Tasks) Modeling
or
Tasks Modeling
area to view the impact of changing the number of iterations and the iteration duration on the predicted performance for the selected parallel site (the label displayed depends on whether iteration loop annotations or general task annotations were detected). For example, you might want to see the impact of modifying your nested change loop structure, modify the loop body code, or change number of iterations. After you slide the
Avg. Number of Iterations (Tasks):
or
Avg. Number of Tasks:
and the
Avg. Duration
values, click the
Apply
button to view the predicted performance estimates. Repeat as needed.
Use the
Runtime Modeling
area to view the predicted impact of adjusting run-time parallel characteristics
after
you add parallelism for the selected parallel site, including using parallel framework capabilities to minimize parallel overhead or tuning your parallel code.
If you agree to later check and modify runtime performance aspects for a category, check the box to the left of that category name. For example, you can also examine and tune actual parallel code performance characteristics using tools like
Intel® VTune™
Profiler
and implement the runtime capabilities of high-level parallel frameworks to limit parallel overhead, such as task chunking. As you check or uncheck different categories, the predicted performance estimates are updated automatically. Repeat as needed.
If you choose
Target System
as
Intel Xeon Phi
or
Offload to Intel Xeon Phi
, additional
Intel Xeon Phi Advanced Modeling
options (not shown) appear below
Runtime Modeling
(see
Intel® Xeon Phi™
Advanced Modeling
).
The
Intel® Advisor
Suitability tool predicts the general performance characteristics of CPUs and
Intel Xeon Phi
coprocessors. For example, it does not consider CPU clock frequency, cache characteristics, versions of processors, and so on.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804