User Guide


Suitability Report, Site Details, Site Row

If you choose a
Target System
, to view detailed characteristics of the selected site and its tasks and locks, click the
Site Details
Selected Site
row shows the overall statistics for the Selected Site. Below the
Selected Site
row, view the Tasks and Locks executed in this Site, including the
Number of Instances
Total Serial Time
for the entire site and each task and lock within the site.
You can reduce Site overhead by combining multiple site execution into a single site execution, for example putting a site outside a loop instead of inside a loop (moving a loop surrounding a site to be inside of the site). Under
Runtime Modeling
, you can view the predicted site overhead values and other predicted overhead or lock contention values (see below).

For Each Site, Decide Whether to Modify or Keep Annotations

Use the
Suitability Report
window to view the predicted parallel performance of each parallel site and its impact on the
Maximum Program Gain for All Sites
. For example, if a site either has a
Site Gain
of less than 1.0 or does not contribute to
Maximum Program Gain for All Sites
, modify or remove its annotations. In contrast, any site that contributes to
Maximum Program Gain for All Sites
should be kept. For most sites, carefully examine the annotations, overhead assumptions, and related code.
In the upper-right part of the
Suitability Report
pane, if multiple parallel sites were detected during target execution, select a different Site row to display its details.

Implementing Modeling Assumptions Later When Adding Parallel Code

In the lower-right part of the Suitability Report under
Runtime Modeling
, changing a checkmark does not resolve an issue - it configures the modeling of your proposed parallel program execution. To implement the modeled improvements indicated by the check boxes, use specific parallel framework constructs in the
Add Parallel Framework
step of the workflow and consider .

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserverd for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804