Developer Guide and Reference

Contents

ftls-model

Changes the thread local storage (TLS) model.

Syntax

Linux:
-ftls-model=
model
macOS:
-ftls-model=
model
Windows:
None
Arguments
model
Determines the TLS model used by the compiler. Possible values are:
global-dynamic
Generates a generic TLS code. The code can be used everywhere and the code can access variables defined anywhere else. This setting causes the largest size code to be generated and uses the most run time to produce.
local-dynamic
Generates an optimized TLS code. To use this setting, the thread-local variables must be defined in the same object in which they are referenced.
initial-exec
Generates a restrictive, optimized TLS code. To use this setting, the thread-local variables accessed must be defined in one of the modules available to the program.
local-exec
Generates the most restrictive TLS code. To use this setting, the thread-local variables must be defined in the executable.
Default
OFF
The compiler uses default heuristics when determining the thread-local storage model.
Description
This option changes the thread local storage (TLS) model. Thread-local storage is a mechanism by which variables are allocated in a way that causes one instance of the variable per extant thread.
For more information on the thread-storage localization models, see the appropriate gcc* documentation.
For more information on the thread-storage localization models, see the appropriate clang* documentation.
Alternate Options
None

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804