Developer Guide and Reference

Contents

qopt-prefetch-distance, Qopt-prefetch-distance

Specifies the prefetch distance to be used for compiler-generated prefetches inside loops.

Syntax

Linux:
-qopt-prefetch-distance
=
n1
[
,
n2
]
macOS:
None
Windows:
/Qopt-prefetch-distance
:
n1
[
,
n2
]
Arguments
n1, n2
Is the prefetch distance in terms of the number of (possibly-vectorized) iterations. Possible values are non-negative numbers >=0.
n2
is optional.
n1
= 0 turns off all compiler issued prefetches from memory to L2.
n2
= 0 turns off all compiler issued prefetches from L2 to L1. If
n2
is specified and
n1
> 0,
n1
should be >=
n2
.
Default
OFF
The compiler uses default heuristics to determine the prefetch distance.
Description
This option specifies the prefetch distance to be used for compiler-generated prefetches inside loops. The unit (
n1
and optionally
n2
) is the number of iterations. If the loop is vectorized by the compiler, the unit is the number of vectorized iterations.
The value of
n1
will be used as the distance for prefetches from memory to L2 (for example, the vprefetch1 instruction). If
n2
is specified, it will be used as the distance for prefetches from L2 to L1 (for example, the vprefetch0 instruction).
This option is ignored if option
-qopt-prefetch=0
(Linux*) or
/Qopt-prefetch:0
(Windows*) is specified.
Alternate Options
None
Consider the following Linux* examples:
-qopt-prefetch-distance=64,32
The above causes the compiler to use a distance of 64 iterations for memory to L2 prefetches, and a distance of 32 iterations for L2 to L1 prefetches.
-qopt-prefetch-distance=24
The above causes the compiler to use a distance of 24 iterations for memory to L2 prefetches. The distance for L2 to L1 prefetches will be determined by the compiler.
-qopt-prefetch-distance=0,4
The above turns off all memory to L2 prefetches inserted by the compiler inside loops. The compiler will use a distance of 4 iterations for L2 to L1 prefetches.
-qopt-prefetch-distance=16,0
The above causes the compiler to use a distance of 16 iterations for memory to L2 prefetches. No L2 to L1 loop prefetches are issued by the compiler.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804