Performs optimizations for specific processors but does not cause extended instruction sets to be used (unlike -march).
Linux and macOS:
- Is the processor for which the compiler should perform optimizations. Possible values are:
- Optimizes code for the compiler's default behavior.
- Optimizes code for processors that support the specified Intel® processor or microarchitecture code name.Keywordsknlandsilvermontare only available on Windows* and Linux* systems.Keywordicelakeis deprecated and may be removed in a future release.
- Optimizes code for processors that support Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- Optimizes code for processors that supportFloat-16 conversion instructions andthe RDRND instruction, Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- Optimizes code for processors that support Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- Optimizes code for processors that support Intel® SSE4 Efficient Accelerated String and Text Processing instructions. May also generate code for Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSE3, SSE2, SSE, and SSSE3 instructions.
- Optimizes code for processors that support MOVBE instructions, depending on the setting of option. May also generate code for SSSE3 instructions and Intel® SSE3, SSE2, and SSE instructions.-minstruction(Linux* and) ormacOS*/Qinstruction(Windows*)
- Optimizes for the Intel® Core™2 processor family, including support for MMX™, Intel® SSE, SSE2, SSE3 and SSSE3 instruction sets.
- Optimizes for Intel® Pentium® with MMX technology.
- Optimizes for Intel® Pentium® Pro, Intel Pentium II, and Intel Pentium III processors.
- Optimizes for Intel® Pentium® 4 processors with MMX technology.
- Optimizes code for Intel® Pentium® processors. Valuepentium3is only available on Linux* systems.
- Code is generated for the compiler's default behavior.
This option performs optimizations for specific processors but does not cause extended instruction sets to be used (unlike
The resulting executable is backwards compatible and generated code is optimized for specific processors. For example, code generated with
/tune:core2will run correctly on 4th Generation Intel® Core™ processors, but it might not run as fast as if it had been generated using
/tune:haswell. Code generated with
/tune:core-avx2) will also run correctly on Intel® Core™2 processors, but it might not run as fast as if it had been generated using
/tune:core2. This is in contrast to code generated with
or, which will not run correctly on older processors such as Intel® Core™2 processors.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804
- Linux:-mcpu(this is a deprecated option): NonemacOS*Windows: None