Developer Guide and Reference

Contents

check-pointers-mpx, Qcheck-pointers-mpx

Determines whether the compiler checks bounds for memory access through pointers on processors that support Intel® Memory Protection Extensions (Intel® MPX).

Syntax

Linux:
-check-pointers-mpx
=
keyword
macOS:
None
Windows:
/Qcheck-pointers-mpx
:
keyword
Arguments
keyword
Specifies what type of bounds checking occurs. Possible values are:
none
Disables bounds checking. This is the default.
rw
Checks bounds for reads and writes through pointers.
write
Checks bounds for only writes through pointers.
Default
-check-pointers-mpx=none
or
/Qcheck-pointers-mpx:none
No bounds checking occurs for memory access through pointers on processors that support Intel® MPX.
Description
This option determines whether the compiler checks bounds for memory access through pointers on processors that support Intel® MPX. It enables checking of all indirect accesses through pointers, and all array accesses.
The compiler may optimize these checks away when it can determine that an access is safe.
If you specify option
[Q]check-pointers
along with option
[Q]check-pointers-mpx
, option
[Q]check-pointers-mpx
takes precedence.
If you specify
[Q]check-pointers-mpx
, you cannot specify option
[Q]check-pointers-dangling
.
This feature requires supporting hardware, OS, and library support. Intel® MPX bounds exceptions are hardware exceptions that are handled by the OS and run-time library, similar to the way that a null pointer exception is handled. Pointer Checker detailed reports and report control functions are not enabled with Intel® MPX, because these require overriding the OS exception handling.
For more details, see the document titled: Intel® Memory Protection Extensions Enabling Guide, which is located at http://intel.ly/1QlUdjN
This pointer checker feature requires installation of another product. For more information, see .
Alternate Options
None

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804