Developer Guide and Reference

Contents

par-runtime-control, Qpar-runtime-control

Generates code to perform run-time checks for loops that have symbolic loop bounds.

Syntax

Linux and macOS:
-par-runtime-control
[
n
]
-no-par-runtime-control
Windows:
/Qpar-runtime-control
[
n
]
/Qpar-runtime-control-
Arguments
n
Is a value denoting what kind of runtime checking to perform. Possible values are:
0
Performs no runtime check based on auto-parallelization. This is the same as specifying
-no-par-runtime-control
(Linux* and
macOS*
) or
/Qpar-runtime-control-
(Windows*).
1
Generates runtime check code under conservative mode. This is the default if you do not specify
n
.
2
Generates runtime check code under heuristic mode.
3
Generates runtime check code under aggressive mode.
Default
-no-par-runtime-control
or
/Qpar-runtime-control-
The compiler uses default heuristics when checking loops.
Description
This option generates code to perform run-time checks for loops that have symbolic loop bounds.
If the granularity of a loop is greater than the parallelization threshold, the loop will be executed in parallel.
If you do not specify this option, the compiler may not parallelize loops with symbolic loop bounds if the compile-time granularity estimation of a loop can not ensure it is beneficial to parallelize the loop.
This option may behave differently on Intel® microprocessors than on non-Intel microprocessors.
Alternate Options
None

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804