Developer Guide and Reference

Contents

Details about Intrinsics

All instructions use the following features:
  • Registers
  • Data Types

Registers

Intel® processors provide special register sets for different instructions.
  • Intel® MMX™ instructions use eight 64-bit registers (
    mm0
    to
    mm7
    ) which are aliased on the floating-point stack registers.
  • Intel® Streaming SIMD Extensions (Intel® SSE) and the Advanced Encryption Standard (AES) instructions use eight 128-bit registers (
    xmm0
    to
    xmm7
    ).
  • Intel® Advanced Vector Extensions (Intel® AVX) instructions use 256-bit registers which are extensions of the 128-bit SIMD registers.
  • Intel® Advanced Vector Extensions 512 (Intel® AVX-512) instructions use 512-bit registers.
Because each of these registers can hold more than one data element, the processor can process more than one data element simultaneously. This processing capability is also known as single-instruction multiple data processing (SIMD).
For each computational and data manipulation instruction in the new extension sets, there is a corresponding C intrinsic that implements that instruction directly. This frees you from managing registers and assembly programming. Further, the compiler optimizes the instruction scheduling so that your executable runs faster.

Data Types

Intrinsic functions use new C data types as operands, representing the new registers that are used as the operands to these intrinsic functions.
The following table details for which instructions each of the new data types are available. A 'Yes' indicates that the data type is available for that group of intrinsics; an 'NA' indicates that the data type is not available for that group of intrinsics.
Data Types -->
Technology
__m64
__m128
__m128d
__m128i
__m256
__m256d
__m256i
__m512
__m512d
__m512i