Developer Guide and Reference

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_mm256_hsub_epi16/32

Horizontally subtracts adjacent signed packed 16/32-bit integer data elements of two vectors. The corresponding Intel® AVX2 instruction is
VPHSUBW
or
VPHSUBD
.

Syntax

extern __m256i _mm256_hsub_epi16(__m256i s1, __m256i s2);
extern __m256i _mm256_hsub_epi32(__m256i s1, __m256i s2);
Arguments
s1
integer source vector used for the operation
s2
integer source vector used for the operation
Description
Performs horizontal subtraction on each adjacent pair of 16- or 32-bit signed integers by subtracting the most significant word from the least significant word of each pair source vectors
s2
and
s2
, and packs the signed 16- or 32-bit results to the destination vector.
Returns
Result of the horizontal subtraction operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804