Developer Guide and Reference

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_mm256_mpsadbw_epu8

Performs multiple sum of absolute differences on extended packed unsigned integer values ofs two vectors. The corresponding Intel® AVX2 instruction is
VMPSADBW
.

Syntax

extern __m256i _mm256_mpsadbw_epu8(__m256i s1, __m256i s2, const int mask);
Arguments
s1
integer source vector used for the operation
s2
integer source vector used for the operation
mask
integer constant specifying offset
Description
Performs multiple sum operations of the absolute difference of blocks of four packed unsigned bytes of vector
s2
with sequential blocks of four packed unsigned bytes in vector
s1
. The offset granularity in both vectors is 32 bits.
The sum-absolute-difference (SAD) operation is repeated 16 times by the intrinsic between the
s2
vector with a fixed offset and a variable
s1
vector where the offset is shifted by eight bits for each SAD operation. The integer constant specified in
mask
provides bit fields that specify the initial offset for
s2
and
s1
vectors. Each 16-bit result of eight SAD operations is written to the respective word in the result vector.
Returns
Result of the multiple sum-absolute-difference operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804