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_mm256_mulhrs_epi16

Multiplies extended packed unsigned integers of two vectors with round and scale. The corresponding Intel® AVX2 instruction is
VPMULHRSW
.

Syntax

extern __m256i _mm256_mulhrs_epi16(__m256i s1, __m256i s2);
Arguments
s1
integer source vector used for the operation
s2
integer source vector used for the operation
Description
Vertically multiplies each signed 16-bit integer from
s1
vector with the corresponding signed 16-bit integer of
s2
vector, producing intermediate, signed 32-bit integers. Each intermediate 32-bit integer is truncated to the 18 most-significant-bits. Rounding is performed by adding 1 to the least-significant-bit of the 18-bit intermediate result.
The final result is obtained by selecting the 16 bits immediately to the right of the most-significant-bit of each 18-bit intermediate result and packing them to the destination operand.
Returns
Result of the multiply, round, and scale operation.