Developer Guide and Reference

Contents

_mm256_andnot_si256

Performs bitwise logical
AND NOT
operation on signed integer vectors. The corresponding Intel® AVX2 instruction is
VPANDN
.

Syntax

extern __m256i _mm256_andnot_si256(__m256i s1, __m256i s2);
Arguments
s1
signed integer vector used for the operation
s2
signed integer vector also used for the operation
Description
Performs a bitwise logical NOT operation on source vector
s1
then performs bitwise AND with source vector
s2
and stores the result in the destination vector. If the corresponding bit in the first vector is 0 and the corresponding bit in the second vector is 1, each bit of the result is set to 1, otherwise it is set to 0.
Returns
Result of the bitwise logical
AND NOT
operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804