Developer Guide and Reference

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_mm256_addsub_ps

Adds odd float32 elements and subtracts even float32 elements of vectors. The corresponding Intel® AVX instruction is
VADDSUBPS
.

Syntax

extern __m256 _mm256_addsub_ps(__m256 m1, __m256 m2);
Arguments
m1
float32 vector used for the operation
m2
float32 vector also used for the operation
Description
Performs a SIMD addition of the odd single-precision floating-point elements (float32 elements) in the first source vector
m1
with the odd float32 elements in the second source vector
m2
.
Simultaneously, the intrinsic performs subtraction of the even single-precision floating-point elements (float32 elements) in the second source vector,
m2
, from the even float32 elements in the first source vector,
m1
.
Returns
Result of the operation stored in the result vector.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804