Developer Guide and Reference

Contents

_mm256_div_pd

Divides float64 vectors. The corresponding Intel® AVX instruction is
VDIVPD
.

Syntax

extern __m256d _mm256_div_pd(__m256d m1, __m256d m2);
Arguments
m1
float64 vector used for the operation
m2
float64 vector also used for the operation
Description
Performs a SIMD division of four packed double-precision floating-point elements (float64 elements) in the first source vector
m1
with four float64 elements in the second source vector
m2
.
Returns
Result of the division operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804