Developer Guide and Reference



Moves packed double-precision floating point values from aligned memory location to a destination vector. The corresponding Intel® AVX instruction is


extern __m256d _mm256_load_pd(double const *a);
pointer to a memory location that can hold constant float64 values; the address must be 32-byte aligned
Loads packed double-precision floating point values (float64 values) from the 256-bit aligned memory location pointed to by
, into a destination float64 vector, which is retured by the intrinsic.
A 256-bit vector with float64 values.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804