Developer Guide and Reference



Moves packed double-precision floating-point values using non-temporal hint. The corresponding Intel® AVX instruction is


extern void _mm256_stream_pd(double *p, __m256d a);
pointer to a memory location that can hold double-precision floating point (float64) values; the address must be 32-byte aligned
float64 vector
Performs a store operation by moving packed double-precision floating point values (float64 values) from a float64 vector,
, to a 256-bit aligned memory location, pointed to by
, using a non-temporal hint to prevent caching of the data during the write to memory.
Result of the streaming/store operation.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804