Developer Guide and Reference

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_mm256_testnzc_si256

Performs a packed bit test of two integer vectors to set ZF and CF flags. The corresponding Intel® AVX instruction is
VPTEST
.

Syntax

extern int _mm256_testnzc_si256(__m256i s1, __m256i s2);
Arguments
s1
first source integer vector
s2
second source integer vector
Description
Performs a packed bit test of
s1
and
s2
vectors using
VTESTPD
s1
,
s2
instruction and checks the status of the ZF and CF flags. The intrinsic returns 1 if both ZF and CF flags are not 1 (that is, both flags are not set), otherwise returns 0 (that is, one of the flags is set) .
The
VTESTPD
instruction performs a bitwise comparison of all the sign bits of the integer elements in the first source operand and corresponding sign bits in the second source operand. If the AND of the first source operand sign bits with the second source operand sign bits produces all zeros, the ZF flag is set else the ZF flag is clear. If the AND of the inverted first source operand sign bits with the second source operand sign bits produces all zeros the CF flag is set, else the CF flag is clear.
Returns
1: indicates that both ZF and CF flags are clear
0: indicates that either ZF or CF flag is set