• 19.1
  • 12/16/2019
  • Public Content


Shuffles float64 vectors. The corresponding Intel® AVX instruction is


extern __m256d _mm256_shuffle_pd(__m256d m1, __m256d m2, const int select);
float64 vector used for the operation
float64 vector also used for the operation
a constant of integer type that determines which elements of the source vectors are moved to the result
Moves or shuffles either of the two packed double-precision floating-point elements (float64 elements) from the double quadword in the source vectors to the low and high quadwords of the double quadword of the result.
The elements of the first source vector are moved to the low quadword while the elements of the second source vector are moved to the high quadword of the result. The constant defined by the
parameter determines which of the two elements of the source vectors are moved to the result.
Result of the shuffle operation.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804