Developer Guide and Reference

Contents

Logical Intrinsics

Intel® Streaming SIMD Extensions 2 (Intel® SSE2) intrinsics for integer logical operations are listed in this topic. The prototypes for Intel® SSE2 intrinsics are in the
emmintrin.h
header file.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>
The results of each intrinsic operation are placed in register
R
. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic.
Intrinsic Name
Operation
Corresponding
Intel® SSE2 Instruction
_mm_and_si128
Computes AND
PAND
_mm_andnot_si128
Computes AND and NOT
PANDN
_mm_or_si128
Computes OR
POR
_mm_xor_si128
Computes XOR
PXOR

_mm_and_si128

__m128i _mm_and_si128(__m128i a, __m128i b);
Computes the bitwise AND of the 128-bit value in
a
and the 128-bit value in
b
.
R0
a & b

_mm_andnot_si128

__m128i _mm_andnot_si128(__m128i a, __m128i b);
Computes the bitwise AND of the 128-bit value in
b
and the bitwise NOT of the 128-bit value in
a
.
R0
(~a) & b

_mm_or_si128

__m128i _mm_or_si128(__m128i a, __m128i b);
Computes the bitwise OR of the 128-bit value in
a
and the 128-bit value in
b
.
R0
a | b

_mm_xor_si128

__m128i _mm_xor_si128(__m128i a, __m128i b);
Computes the bitwise XOR of the 128-bit value in
a
and the 128-bit value in
b
.
R0
a ^ b

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804